CY8C5668AXI-LP010

The CY8C5668AXI-LP010 is a 32-bit PSoC® 5LP true System-on-Chip Microcontroller with memory, analog and digital peripheral functions. The CY8C56LP family offers a modern method of signal acquisition, signal processing and control with high accuracy, high bandwidth and high flexibility. Analog capability spans the range from thermocouples (near DC voltages) to ultrasonic signals. The CY8C56LP family can handle dozens of data acquisition channels and analog inputs on every general-purpose input/output (GPIO) pin. The CY8C56LP family is also a high performance configurable digital system with some part numbers including interfaces such as USB and inter-integrated circuit (I²C). In addition to communication interfaces, the CY8C56LP family has an easy to configure logic array, flexible routing to all I/O pins and a high performance ARM Cortex-M3 microprocessor core.

• 32-bit ARM Cortex-M3 CPU core
• 256kB of Flash program memory
• 64kB of SRAM
• Up to 32kB flash error correcting code (ECC) or configuration storage
• 2kB EEPROM memory
• 24-channel DMA with multilayer AHB bus access
• Any GPIO to any digital or analog peripheral routability
• LCD direct drive from any GPIO, up to 46x16 segments
• CapSense® support from any GPIO
• 1.2 to 5.5V I/O Interface voltages, up to four domains
• Maskable, independent IRQ on any pin or port
• Schmitt-trigger TTL inputs
• All GPIOs configurable as open drain high/low, pull-up/pull-down, High Z or strong output
• 25mA Sink on SIO
• 20 to 24 Programmable PLD based universal digital blocks (UDB)
• Full-speed (FS) USB 2.0 12Mbps using a 24MHz external oscillator
• Four 16-bit configurable timer, counter and PWM blocks
• 67MHz, 24-bit Fixed point digital filter block (DFB) to implement FIR and IIR filters
• Cyclic redundancy check (CRC)
• Pseudo random sequence (PRS) generator
• LIN bus 2.0
• Quadrature decoder
• Configurable delta sigma ADC and Two SAR ADCs
• Four 8-bit 8MSPS IDACs or 1MSPS VDACs

Applications

Industrial